In DC to DC circuit, boost circuit and buck circuit are applied to many fields. FIG. 1 is a circuit diagram illustrating conventional boost circuit, which includes an input terminal Vin, an inductor L, a diode D, a switch Q, a regulation filtering capacitor C, a pulse width modulation (PWM) generator (not shown) and an output terminal Vout. The PWM signal outputted from the PWM generator includes a first pulse section in which the pulse level is high (Ton) and a second pulse section in which the pulse level is low (Toff). The sum of these two times is one period (T). The ratio of the time in which the pulse is at “Ton” to the period “T” of the pulse is referred to as duty cycle D.
The principle of operation for the boost circuit 100 is as follows. When the pulse level of the PWM signal is high, the switch Q is turned on, and the diode D is cut-off. Meanwhile, the inductor L is charged by a power supply via a path 14. When the pulse level of the PWM signal is low, the switch Q is turned off, and the diode D conducts. Under this condition, the inductor L releases energy via a path 12. Assuming that an induction electromotive force (EMF) generated by the inductor L is VL at this time, then Vout=Vin+VL, thereby achieving the effect of the boost. The Vin and VL relate to the duty cycle D, according to the law of the conservation of energy and accompanying continuous inductor current mode (CCM mode), and ultimately Vout=Vin/(1−D) can be derived.
However, if the Vout is risen to a higher voltage, the switch Q has to withstand the voltage of the Vout, so an issue of the withstand voltage limit of the switch Q occurs. In addition, it can be seen from the above-mentioned formula. In order to rise to a higher voltage, the duty cycle D needs to increase, that is, to extend the first pulse section. However, when the first pulse section closes to the period T, the switch Q may not be turned off in such a short time. Therefore, a limit that the duty cycle D can not close to 1 occurs, and the limit causes the conventional boost circuit not to achieve desired results.